Date:   Mon, 30 Aug 1999 00:32:04 +0200 (MET DST)
From:   Mikael Pettersson <mikpe@csd.uu.se>
To:     linux-kernel@vger.rutgers.edu
Subject: Announce: release 0.5 of x86 performance-monitoring counters patch

I've updated my x86 performance-monitoring counters patch,
which provides user-space access to the performance-monitoring
counters (PMCs) in Intel P5/P6, Cyrix, and WinChip processors.
The current version is release 0.5 for kernel 2.3.15.

The current release provides (a) virtual PMCs and TSCs that are
saved and resumed automatically as processes are, (b) hardware
support for Intel, Cyrix, and IDT WinChip [the AMD K7 may be
supported if I can find the appropriate documentation], and
(c) a "remote-control" feature which allows "monitor" processes
to control and sample the PMCs of other processes.
The code should be SMP-safe, although I have not been able to
test it on an SMP machine.

(Item (c) is the main change since the previously announced
release 0.2 from June.)

This and future versions of this package can be downloaded from
http://www.csd.uu.se/~mikpe/linux/


/ Mikael Pettersson

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