Family dpll netlink specification

Summary

DPLL subsystem.

Operations

device-id-get

Get id of dpll device that matches given attributes

attribute-set:

dpll

flags:

[admin-perm]

do:

pre

dpll-lock-doit

post

dpll-unlock-doit

request

attributes:

[module-name, clock-id, type]

reply

attributes:

[id]

device-get

Get list of DPLL devices (dump) or attributes of a single dpll device

attribute-set:

dpll

flags:

[admin-perm]

do:

pre

dpll-pre-doit

post

dpll-post-doit

request

attributes:

[id]

reply

attributes:

[id, module-name, mode, mode-supported, lock-status, lock-status-error, temp, clock-id, type]

dump:

reply

attributes:

[id, module-name, mode, mode-supported, lock-status, lock-status-error, temp, clock-id, type]

device-set

Set attributes for a DPLL device

attribute-set:

dpll

flags:

[admin-perm]

do:

pre

dpll-pre-doit

post

dpll-post-doit

request

attributes:

[id]

device-create-ntf

Notification about device appearing

notify:

device-get

mcgrp:

monitor

device-delete-ntf

Notification about device disappearing

notify:

device-get

mcgrp:

monitor

device-change-ntf

Notification about device configuration being changed

notify:

device-get

mcgrp:

monitor

pin-id-get

Get id of a pin that matches given attributes

attribute-set:

pin

flags:

[admin-perm]

do:

pre

dpll-lock-doit

post

dpll-unlock-doit

request

attributes:

[module-name, clock-id, board-label, panel-label, package-label, type]

reply

attributes:

[id]

pin-get

Get list of pins and its attributes.

• dump request without any attributes given - list all the pins in the system

• dump request with target dpll - list all the pins registered with a given dpll device

• do request with target dpll and target pin - single pin attributes

attribute-set:

pin

flags:

[admin-perm]

do:

pre

dpll-pin-pre-doit

post

dpll-pin-post-doit

request

attributes:

[id]

reply

attributes:

[id, board-label, panel-label, package-label, type, frequency, frequency-supported, capabilities, parent-device, parent-pin, phase-adjust-min, phase-adjust-max, phase-adjust, fractional-frequency-offset, esync-frequency, esync-frequency-supported, esync-pulse]

dump:

request

attributes:

[id]

reply

attributes:

[id, board-label, panel-label, package-label, type, frequency, frequency-supported, capabilities, parent-device, parent-pin, phase-adjust-min, phase-adjust-max, phase-adjust, fractional-frequency-offset, esync-frequency, esync-frequency-supported, esync-pulse]

pin-set

Set attributes of a target pin

attribute-set:

pin

flags:

[admin-perm]

do:

pre

dpll-pin-pre-doit

post

dpll-pin-post-doit

request

attributes:

[id, frequency, direction, prio, state, parent-device, parent-pin, phase-adjust, esync-frequency]

pin-create-ntf

Notification about pin appearing

notify:

pin-get

mcgrp:

monitor

pin-delete-ntf

Notification about pin disappearing

notify:

pin-get

mcgrp:

monitor

pin-change-ntf

Notification about pin configuration being changed

notify:

pin-get

mcgrp:

monitor

Multicast groups

• monitor

Definitions

mode

type:

enum

doc:

working modes a dpll can support, differentiates if and how dpll selects one of its inputs to syntonize with it, valid values for DPLL_A_MODE attribute

entries:

manual:

input can be only selected by sending a request to dpll

automatic:

highest prio input pin auto selected by dpll

lock-status

type:

enum

doc:

provides information of dpll device lock status, valid values for DPLL_A_LOCK_STATUS attribute

entries:

unlocked:

dpll was not yet locked to any valid input (or forced by setting DPLL_A_MODE to DPLL_MODE_DETACHED)

locked:

dpll is locked to a valid signal, but no holdover available

locked-ho-acq:

dpll is locked and holdover acquired

holdover:

dpll is in holdover state - lost a valid lock or was forced by disconnecting all the pins (latter possible only when dpll lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ, if dpll lock-state was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the dpll’s lock-state shall remain DPLL_LOCK_STATUS_UNLOCKED)

lock-status-error

type:

enum

doc:

if previous status change was done due to a failure, this provides information of dpll device lock status error. Valid values for DPLL_A_LOCK_STATUS_ERROR attribute

entries:

none:

dpll device lock status was changed without any error

undefined:

dpll device lock status was changed due to undefined error. Driver fills this value up in case it is not able to obtain suitable exact error type.

media-down:

dpll device lock status was changed because of associated media got down. This may happen for example if dpll device was previously locked on an input pin of type PIN_TYPE_SYNCE_ETH_PORT.

fractional-frequency-offset-too-high:

the FFO (Fractional Frequency Offset) between the RX and TX symbol rate on the media got too high. This may happen for example if dpll device was previously locked on an input pin of type PIN_TYPE_SYNCE_ETH_PORT.

clock-quality-level

type:

enum

doc:

level of quality of a clock device. This mainly applies when the dpll lock-status is DPLL_LOCK_STATUS_HOLDOVER. The current list is defined according to the table 11-7 contained in ITU-T G.8264/Y.1364 document. One may extend this list freely by other ITU-T defined clock qualities, or different ones defined by another standardization body (for those, please use different prefix).

entries:

itu-opt1-prc:

itu-opt1-ssu-a:

itu-opt1-ssu-b:

itu-opt1-eec1:

itu-opt1-prtc:

itu-opt1-eprtc:

itu-opt1-eeec:

itu-opt1-eprc:

temp-divider

type:

const

value:

1000

doc:

temperature divider allowing userspace to calculate the temperature as float with three digit decimal precision. Value of (DPLL_A_TEMP / DPLL_TEMP_DIVIDER) is integer part of temperature value. Value of (DPLL_A_TEMP % DPLL_TEMP_DIVIDER) is fractional part of temperature value.

type

type:

enum

doc:

type of dpll, valid values for DPLL_A_TYPE attribute

entries:

pps:

dpll produces Pulse-Per-Second signal

eec:

dpll drives the Ethernet Equipment Clock

pin-type

type:

enum

doc:

defines possible types of a pin, valid values for DPLL_A_PIN_TYPE attribute

entries:

mux:

aggregates another layer of selectable pins

ext:

external input

synce-eth-port:

ethernet port PHY’s recovered clock

int-oscillator:

device internal oscillator

gnss:

GNSS recovered clock

pin-direction

type:

enum

doc:

defines possible direction of a pin, valid values for DPLL_A_PIN_DIRECTION attribute

entries:

input:

pin used as a input of a signal

output:

pin used to output the signal

pin-frequency-1-hz

type:

const

value:

1

pin-frequency-10-khz

type:

const

value:

10000

pin-frequency-77_5-khz

type:

const

value:

77500

pin-frequency-10-mhz

type:

const

value:

10000000

pin-state

type:

enum

doc:

defines possible states of a pin, valid values for DPLL_A_PIN_STATE attribute

entries:

connected:

pin connected, active input of phase locked loop

disconnected:

pin disconnected, not considered as a valid input

selectable:

pin enabled for automatic input selection

pin-capabilities

type:

flags

doc:

defines possible capabilities of a pin, valid flags on DPLL_A_PIN_CAPABILITIES attribute

entries:

direction-can-change:

pin direction can be changed

priority-can-change:

pin priority can be changed

state-can-change:

pin state can be changed

phase-offset-divider

type:

const

value:

1000

doc:

phase offset divider allows userspace to calculate a value of measured signal phase difference between a pin and dpll device as a fractional value with three digit decimal precision. Value of (DPLL_A_PHASE_OFFSET / DPLL_PHASE_OFFSET_DIVIDER) is an integer part of a measured phase offset value. Value of (DPLL_A_PHASE_OFFSET % DPLL_PHASE_OFFSET_DIVIDER) is a fractional part of a measured phase offset value.

Attribute sets

dpll

id (u32)

module-name (string)

pad (pad)

clock-id (u64)

mode (u32)

enum:

mode

mode-supported (u32)

enum:

mode

multi-attr:

True

lock-status (u32)

enum:

lock-status

temp (s32)

type (u32)

enum:

type

lock-status-error (u32)

enum:

lock-status-error

clock-quality-level (u32)

enum:

clock-quality-level

multi-attr:

True

doc:

Level of quality of a clock device. This mainly applies when the dpll lock-status is DPLL_LOCK_STATUS_HOLDOVER. This could be put to message multiple times to indicate possible parallel quality levels (e.g. one specified by ITU option 1 and another one specified by option 2).

pin

id (u32)

parent-id (u32)

module-name (string)

pad (pad)

clock-id (u64)

board-label (string)

panel-label (string)

package-label (string)

type (u32)

enum:

pin-type

direction (u32)

enum:

pin-direction

frequency (u64)

frequency-supported (nest)

multi-attr:

True

nested-attributes:

frequency-range

frequency-min (u64)

frequency-max (u64)

prio (u32)

state (u32)

enum:

pin-state

capabilities (u32)

enum:

pin-capabilities

parent-device (nest)

multi-attr:

True

nested-attributes:

pin-parent-device

parent-pin (nest)

multi-attr:

True

nested-attributes:

pin-parent-pin

phase-adjust-min (s32)

phase-adjust-max (s32)

phase-adjust (s32)

phase-offset (s64)

fractional-frequency-offset (sint)

doc:

The FFO (Fractional Frequency Offset) between the RX and TX symbol rate on the media associated with the pin: (rx_frequency-tx_frequency)/rx_frequency Value is in PPM (parts per million). This may be implemented for example for pin of type PIN_TYPE_SYNCE_ETH_PORT.

esync-frequency (u64)

doc:

Frequency of Embedded SYNC signal. If provided, the pin is configured with a SYNC signal embedded into its base clock frequency.

esync-frequency-supported (nest)

multi-attr:

True

nested-attributes:

frequency-range

doc:

If provided a pin is capable of embedding a SYNC signal (within given range) into its base frequency signal.

esync-pulse (u32)

doc:

A ratio of high to low state of a SYNC signal pulse embedded into base clock frequency. Value is in percents.

pin-parent-device

parent-id

direction

prio

state

phase-offset

pin-parent-pin

parent-id

state

frequency-range

frequency-min

frequency-max